1. Field of the Invention
The present invention relates to a gate driving circuit, and more particularly, to a gate driving circuit having a low leakage current control mechanism.
2. Description of the Prior Art
Because the liquid crystal display (LCD) has advantages of thin appearance, low power consumption, and low radiation, the liquid crystal display has been widely applied in various electronic products for panel displaying. The operation of a liquid crystal display is featured by varying voltage drops between opposite sides of a liquid crystal layer for twisting the angles of the liquid crystal molecules in the liquid crystal layer so that the transparency of the liquid crystal layer can be controlled for illustrating images with the aid of the light source provided by a backlight module.
In general, the liquid crystal display comprises a plurality of pixel units, a gate driving circuit and a source driving circuit. The source driving circuit is utilized for providing a plurality of data signals to be written into the pixel units. The gate driving circuit comprises a plurality of shift registers and functions to provide a plurality of gate driving signals for controlling related writing operations of the pixel units. That is, the gate driving circuit is a key device for providing a control of writing the data signals into the pixel units.
FIG. 1 is a schematic diagram showing a prior-art gate driving circuit. As shown in FIG. 1, for ease of explanation, the gate driving circuit 100 illustrates only an Nth shift register 110. The Nth shift register 110 is employed to generate a gate signal SGn and a start pulse signal STn according to a first clock CK1, a second clock CK2 and a start pulse signal STn−1. The start pulse signal STn is forwarded to another shift register following the Nth shift register 110. The gate signal SGn is furnished to a pixel unit 105 of a pixel array 101 via a gate line GLn so as to control a writing operation for writing the data signal of the data line DLi into the pixel unit 105. The Nth shift register 110 comprises a driving unit 120, an energy store unit 130, a buffer unit 140, a carry unit 170 and a plurality of transistors 191-193. The energy store unit 130 is used to generate a driving control voltage VQn through performing a charging process based on the start pulse signal STn−1 received by the buffer unit 140. The driving unit 120 makes use of the driving control voltage VQn and the first clock CK1 for generating the gate signal SGn outputted to the gate line GLn.
However, in the process of generating the gate signal SGn by the Nth shift register enabled, when the driving unit 120 is working for generating the gate signal SGn having high-level voltage based on the driving control voltage VQn and the first clock CK1 having high-level voltage, the transistor 193 is turned on by the first clock CK1 having high-level voltage; in turn, the driving control voltage VQn is decreasing because of a discharging process occurring to the energy store unit 130 resulting from a leakage current flowing through the transistor 193. As the driving control voltage VQn is decreased, the driving signal SGn generated by the driving unit 120 may be unable to reach a voltage high enough for driving the pixel unit 105 to perform an accurate data signal writing operation, which is likely to reduce image display quality.